ESP32 technical specifications
Same as ESP8266 and older ESP modules, ESP32 can be found in various models with different hardware features. You can see below main specs for the most common versions:
- Main: Tensilica Xtensa 32-bit LX6 microprocessor
- Cores: 2 or 1 (depending on variation) – All chips in the ESP32 series are dual-core except for ESP32-S0WD, which is single-core.
- Clock frequency: up to 240 MHz
- Performance: up to 600 DMIPS
- Secondary (ULP): dedicated for ADC conversions, computation, and level thresholds while in deep sleep.
- Wireless connectivity:
- Wi-Fi: 802.11 b/g/n/e/i (802.11n @ 2.4 GHz up to 150 Mbit/s)
- Bluetooth: v4.2 BR/EDR and Bluetooth Low Energy (BLE)
- Internal memory:
- ROM: 448 KiB – For booting and core functions.
- SRAM: 520 KiB – For data and instruction.
- RTC slow SRAM: 8 KiB – For co-processor accessing during deep-sleep mode.
- RTC fast SRAM: 8 KiB – For data storage and main CPU during RTC Boot from the deep-sleep mode.
- eFuse: 1 Kibit – Of which 256 bits are used for the system (MAC address and chip configuration) and the remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
- Embedded flash: – Flash connected internally via IO16, IO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1 on ESP32-D2WD and ESP32-PICO-D4.
- 0 MiB (ESP32-D0WDQ6, ESP32-D0WD, and ESP32-S0WD chips)
- 2 MiB (ESP32-D2WD chip)
- 4 MiB (ESP32-PICO-D4 SIP module)
- External flash & SRAM: ESP32 without embedded flash supports up to 4 × 16 MiB of external QSPI flash and 8 MiB SRAM with hardware encryption based on AES to protect developer’s programs and data. ESP32 chips with embedded flash do not support the address mapping between external flash and peripherals.
- Peripheral input/output: Rich peripheral interface with DMA that includes capacitive touch, ADCs (analog-to-digital converter), DACs (digital-to-analog converter), I²C (Inter-Integrated Circuit), UART (universal asynchronous receiver/transmitter), CAN 2.0 (Controller Area Network), SPI (Serial Peripheral Interface), I²S (Integrated Inter-IC Sound), RMII (Reduced Media-Independent Interface), PWM (pulse width modulation), and more.
- IEEE 802.11 standard security features all supported, including WFA, WPA/WPA2 and WAPI
- Secure boot
- Flash encryption
- 1024-bit OTP, up to 768-bit for customers
- Cryptographic hardware acceleration: AES, SHA-2, RSA, elliptic curve cryptography (ECC), random number generator (RNG)
To have a better overview about what is under the hood, here is the ESP32 diagram block:
|Minimum order quantity:
|Date first listed on Novatech:
||Aug 24, 2020